Cortex A72: what you need to know – ARM Interview

We caught up with the Cortex-A72’s lead architect and ARM Fellow Mike Filippo to talk about ARM’s next designs.

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20 thoughts on “Cortex A72: what you need to know – ARM Interview

  1. So how does A72 compete with Apples cyclone if?
    Pipeline: A72 = 15 ; Apple Cyclone = 16
    Execution Ports: A72 = 8; Apple Cyclone = 9
    L Cache in KiB: A72 = 48 + 32; Apple Cyclone = 64 + 64
    L2 Cache: A72 = 0.5 – 4MB;  Apple Cyclone = 1
    L3 Cache: A72 = None ; Apple Cyclone = 4MB
    Decode: A72 = 3 wide; Apple Cyclone = 6 wide
    Explain immdediately.

  2. Thats actually a pretty big power reduction and size shrink for this next gen chip. I cant wait to see what it can do in the near future.

  3. 20-60% performance increase? That's a lot more than the measly 15% from generations of PC (Intel) processors. We could only dream of such improvements from the likes of Skylake.

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